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mp7748 2x20w stereo single ended class d audio amplifier mp7748 rev. 1.0 www.monolithicpower.com 1 1/28/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. the future of analog ic technology description the mp7748 is a class d audio amplifier for driving stereo speakers in single-ended configuration or a mono speaker in bridge-tied- load configuration. it is fully integrated audio amplifier which dramatically reduces solution size by integrating the following: ? 250m ? power mosfets ? startup / shutdown pop elimination ? short circuit protection circuits the mp7748 is capable of delivering 20w per channel into 4 ? speaker in single-ended output structure, or delivering 50w into 6 ? speaker in bridge-tied-load output structure under 24v vdd. mps class d audio amplifiers exhibit the high fidelity of a class a/b amplifier at high efficiencies. the circuit is based on the mps? proprietary variable frequency topology that delivers excellent linearity, fast response time and operates on a single power supply. mp7748 features programmable vdd shutdown voltage for each channel by controlling the uvp node voltage. the default vdd shutdown (rising threshold) voltage is 8.4v if the uvp pin is nc. features ? output power at 24v vdd and 10% thd+n ? stereo se configuration: 20w per channel into 4 ? load ? mono btl configuration: 50w into 6 ? load ? thd+n = 0.02% at 1w, 8 ? (se) ? low noise (103v with se configuration, 140v with btl configuration) ? switching frequency up to 1mhz ? 9.5v to 36v operation from a single supply ? integrated startup and shutdown pop elimination circuit ? programmable uvp ? thermal and short circuit protection ? integrated power fets ? available in tssop28-exposed package applications ? portable docking stations ? surround sound dvd systems ? televisions ? flat panel monitors ? multimedia computers ? home stereo systems for mps green status, please visit mps website under quality assurance. ?mps? and ?the future of analog ic technology? are registered trademarks o f monolithic power systems, inc. a am (analog adaptive modulation) is a trademark of monolithic powe r systems, inc. typical application thd+n vs. p out v dd =24v, freq=1khz 0.01 20 0.02 0.05 0.1 0.2 0.5 10 5 2 1 60m 35 100m 1 10 p out (w)
mp7748 ? 2x20w stereo single ended class d audio amplifier mp7748 rev. 1.0 www.monolithicpower.com 2 1/28/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. ordering information part number* package top marking free air temperature (t a ) MP7748DF tssop28f MP7748DF -40 c to +85 c * for tape & reel, add suffix ?z (e.g. MP7748DF?z). for rohs compliant packaging, add suffix ?lf (e.g. MP7748DF?lf?z) package reference n/c in2 pgnd2 timer1 pgnd2 agnd1 sw2 26 25 24 23 exposed pad on backside vdd1 28 27 9 10 7 8 in1 ref1 en1 ref2 uvp1 timer2 top view 20 19 22 21 3 4 5 6 1 2 bst2 vdd2 vdd2 sw2 16 15 18 17 13 14 11 12 uvp2 n/c en2 agnd2 pgnd1 sw1 pgnd1 sw1 bst1 vdd1 absolute maxi mum ratings (1) supply voltage v dd ...................................... 40v bs voltage .................. v sw ? 0.3v to v sw + 6.5v enable voltage v en ......................... -0.3v to +6v v uvp , v sw , v pin , v nin ................... -1v to v dd + 1v agnd to pgnd ........................... -0.3v to +0.3v continuous power dissipation (t a = +25c) (2) ??????????????????....3.9w junction temperature ............................... 150 c lead temperature .................................... 260 c storage temperature ............... -65 c to +150 c recommended operating conditions (3) supply voltage v dd .......................... 9.5v to 36v maximum junction temp. (t j ) ............... +125 c thermal resistance (4) ja jc tssop28f .............................. 32 ....... 6 ........ c notes: 1) exceeding these ratings may damage the device. 2) the maximum allowable power dissipation is a function o f the maximum junction temperature t j (max), the junction-to- ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by pd (max) = (t j (max)-t a )/ ja . exceeding the maximum allowable powe r dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 3) the device is not guaranteed to function outside of its operating conditions. 4) measured on jesd51-7, 4-layer pcb.
mp7748 ? 2x20w stereo single ended class d audio amplifier mp7748 rev. 1.0 www.monolithicpower.com 3 1/28/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. electrical characteristics (5, 6) v dd = 24v, v en = 5v, t a = +25 c, unless otherwise noted. parameters symbol condition min typ max units supply current standby current v en = 0v,nin=pin=float 140 a quiescent current i q sw=low 3 6 ma output drivers sw on resistance sourcing and sinking 0.25 ? short circuit current sourcing and sinking 4.5 a inputs en enable threshold voltage v en rising 1.4 2.0 v v en falling 0.4 1.0 v en enable input current v en = 5v 5 a external undervoltage detection v uvp 4 v external undervoltage detection hysteresis voltage v hys 0.3 v thermal shutdown thermal shutdown trip point t j rising 150 c thermal shutdown hysteresis 30 c note: 5) the device is not guaranteed to function outside its operating rating. 6) electrical characteristics are for the ic only wi th no external components except bypass capacitors.
mp7748 ? 2x20w stereo single ended class d audio amplifier mp7748 rev. 1.0 www.monolithicpower.com 4 1/28/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. operating specifications circuit of figure 5, single-ended output configuration, v dd = 24v, gain=8.25v/v, v en = 5v, t a = +25 c, unless otherwise noted. parameters symbol condition min typ max units standby current v en = 0v 180 a quiescent current switching, no load 26 ma power output f = 1khz, thd+n = 10%, 4 ? load 19.3 w f = 1khz, thd+n = 10%, 8 ? load 10.6 w thd+ noise p out = 1w, f = 1khz, 4 ? load 0.02 % p out = 1w, f = 1khz, 8 ? load 0.02 % efficiency f = 1khz, p out = 19.3w, 4 ? load 91 % f = 1khz, p out = 10.6w, 8 ? load 96 % maximum power bandwi dth 20 khz dynamic range 97 db noise floor a-weighted 103 v power supply rejection v cc =24v, gain=8.25v/v, v ripple =200mv pp c r =100f f = 1khz -59 db f = 217hz -59 db circuit of figure 6, bridge-tied-load output configuration, v dd = 24v, gain=15v/v, v en = 5v, t a = +25 c, unless otherwise noted. parameters symbol condition min typ max units standby current ven = 0v 180 a quiescent current switching, no load 26 ma power output f = 1khz, thd+n = 10%, 6 ? load 50 w f = 1khz, thd+n = 10%, 8 ? load 40 w thd+ noise p out = 1w, f = 1khz, 6 ? load 0.04 % p out = 1w, f = 1khz, 8 ? load 0.03 % efficiency f = 1khz, p out = 50w, 6 ? load 91 % f = 1khz, p out = 40w, 8 ? load 94 % maximum power bandwi dth 20 khz dynamic range 107 db noise floor a-weighted 140 v power supply rejection v cc =24v, gain=15v/v, v ripple =200mv pp f = 1khz -60 db f = 217hz -60 db
mp7748 ? 2x20w stereo single ended class d audio amplifier mp7748 rev. 1.0 www.monolithicpower.com 5 1/28/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. pin functions pin # name description 1, 14 n/c not connected internally 2 ref1 internal analog reference ( vdd/2 ) for amplifier 1. for se conf iguration, connect a bypass capacitor from ref1 to agnd (10 f ). 3 in1 inverting input for amplifier 1. 4 timer1 internal timer input for amplifier 1. connect a capacitor from timer1 to agnd (2.2 f) to set the internal timer for startup pop elimination. 5 agnd1 analog ground for amplifier 1. connect ag nd1 to agnd2. connect pgnd to agnd at a single point. 6 en1 enable input for amplifier 1. drive en1 high to turn on the amplifier 1, low to turn it off. 7 uvp1 under-voltage protection reference inpu t for amplifier 1. connect uvp1 to uvp2. 8 in2 inverting input for amplifier 2. 9 ref2 internal analog reference ( vdd/2 ) for amplifier 2. for se conf iguration, connect a bypass capacitor from ref2 to agnd (10 f ). 10 timer2 internal timer input for amplifier 2. connect a capacitor from timer2 to agnd (2.2uf) to set the internal timer for startup pop elimination. 11 agnd2 analog ground for amplifier 2. connect ag nd2 to agnd1. connect pgnd to agnd at a single point. 12 en2 enable input for amplifier 2. drive en2 high to turn on the amplifier 2, low to turn it off. 13 uvp2 under-voltage protection reference in put for amplifier 2. connect uvp2 to uvp1. 15, 16 vdd2 power supply input for amplifier 2. bypass vd d2 to pgnd2 with a 1f x7r capacitor (in addition to the main bulk capacitor), placed close to the vdd2 and pgnd2 pins. 17 bst2 high-side mosfet bootstrap input for amplifier 2. a capacitor from bst2 to sw2 supplies the gate drive current to the internal high-side mosfet. 18, 19 sw2 switched power output for amplifier 2. 20, 21 pgnd2 power ground for amplifier 2. connect pgnd 2 to pgnd1. connect pgnd to agnd at a single point. 22, 23 vdd1 power supply input for amplifier 1. bypass vd d1 to pgnd1 with a 1f x7r capacitor (in addition to the main bulk capacitor), placed close to the vdd1 and pgnd1 pins. 24 bst1 high-side mosfet bootstrap input for amplifier 1. a capacitor from bst1 to sw1 supplies the gate drive current to the internal high-side mosfet. 25, 26 sw1 switched power output for amplifier 1. 27, 28 pgnd1 power ground for amplifier 1. connect pgnd 1 to pgnd2. connect pgnd to agnd at a single point. exposed pad connect exposed pad to gnd plane for proper thermal performance.
mp7748 ? 2x20w stereo single ended class d audio amplifier mp7748 rev. 1.0 www.monolithicpower.com 6 1/28/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. typical performance curves circuit of figure 5, single-ended output configuration, v dd =24v, v en =5v, a v =8.25v/v, t a = +25 c, unless otherwise noted. frequency (hz) frequency (hz) gain (db) frequency (hz) p out (w) p out (w) amplitude (db) gain (db) frequency (hz) frequency (hz) amplitude (db) frequency (hz) amplitude (dbv) frequency (khz) 60m 35 200m 1 10 60m 35 200m 1 10 20 20k 100 1k 10k 20 20k 100 1k 10k 10 40k 100 1k 10k 10 40k 100 1k 10k 0.001 20 0.01 0.1 0.2 1 10 20 1 0.01 0.02 0.05 0.1 0.2 0.5 2 5 10 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 20 10 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 20 10 +20 +2 +0 +4 +6 +8 +10 +12 +14 +16 +18 +20 +2 +0 +4 +6 +8 +10 +12 +14 +16 +18 20 20k 100 1k 10k -80 +0 +0 -70 -60 -50 -40 -30 -20 -10 20 20k 100 1k 10k -80 -70 -60 -50 -40 -30 -20 -10 -120 +0 -100 -80 -60 -40 -20 220 4681012141618 freq=1khz freq=10khz freq=100hz freq=1khz freq=100hz freq=10khz
mp7748 ? 2x20w stereo single ended class d audio amplifier mp7748 rev. 1.0 www.monolithicpower.com 7 1/28/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. typical performance curves (continued) circuit of figure 5, single-ended output configuration, v dd =24v, v en =5v, a v =8.25v/v, t a = +25 c, unless otherwise noted. amplitude (dbv) amplitude (db) amplitude (dbv) amplitude (dbv) amplitude (db) frequency (khz) frequency (hz) frequency (hz) frequency (hz) frequency (hz) efficiency vs. p out v dd = 24v, input signal frequency=1khz p out (w) t t note: dashed lines represent thermally limited regions. p out vs. v dd input signal frequency =1khz the same p out for both channels p out (w) v dd (v) 0 5 10 15 20 25 30 35 010203040 -120 +0 -100 -80 -60 -40 -20 220 4 6 8 10 12 14 16 18 20 20k 100 1k 10k -120 +0 -100 -80 -60 -40 -20 20k 100 1k 10k -120 +0 -100 -80 -60 -40 -20 20 20 100 +0 -80 -120 -60 -40 -20 30k 1k 10k -100 60 100 +0 -80 -120 -60 -40 -20 30k 1k 10k -100 0 10 20 30 40 50 60 70 80 90 100 0 2 4 6 8 101214161820 left to right right to left left to right right to left
mp7748 ? 2x20w stereo single ended class d audio amplifier mp7748 rev. 1.0 www.monolithicpower.com 8 1/28/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. typical performance curves (continued) circuit of figure 6, btl output configuration, v dd =24v, v en =5v, a v =15v/v, t a = +25 c, unless otherwise noted. frequency (hz) frequency (hz) gain (db) frequency (hz) p out (w) p out (w) amplitude (db) gain (db) frequency (hz) frequency (hz) 20 20k 100 1k 10k 10 40k 100 1k 10k 10 40k 100 1k 10k 0.001 20 0.01 0.1 1 10 20 20k 100 1k 10k 0.001 20 0.01 0.1 1 10 0.02 0.01 0.05 0.1 0.2 0.5 1 2 5 20 10 +20 +25 +30 +0 +5 +10 +15 +20 +25 +30 +0 +5 +10 +15 20 20k 100 1k 10k -80 +0 -70 -60 -50 -40 -30 -20 -10 50m 60 200m 1 10 20 50m 50 200m 1 10 20 0.01 20 0.02 0.05 0.1 0.2 0.5 1 2 5 10 freq=10khz freq=10khz freq=1khz freq=1khz freq=100khz freq=100khz amplitude (db) frequency (hz) amplitude (dbv) frequency (khz) 20 20k 100 1k 10k -80 +0 -70 -60 -50 -40 -30 -20 -10 +0 -80 -60 -40 -20 220 4681012141618 -120 -100
mp7748 ? 2x20w stereo single ended class d audio amplifier mp7748 rev. 1.0 www.monolithicpower.com 9 1/28/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. typical performance curves (continued) circuit of figure 6, btl output configuration, v dd =24v, v en =5v, a v =15v/v, t a = +25 c, unless otherwise noted. 0 5 10 15 20 25 30 35 40 45 50 55 0 10 20 30 40 50 60 70 80 90 amplitude (dbv) frequency (khz) +0 -80 -60 -40 -20 220 4681012141618 -120 -100 amplitude (dbv) amplitude (dbv) frequency (hz) frequency (hz) +0 -80 -120 -60 -40 -20 -100 +0 -80 -120 -60 -40 -20 50 100 30k 1k 10k 50 100 30k 1k 10k -100 note: dashed lines represent thermally limited regions. note: dashed line represents with external heat-sink p out vs. v dd input signal frequency =1khz p out (w) v dd (v) 010203040 efficiency(%) efficiency vs. p out v dd = 24v, input signal frequency=1khz p out (w) 0 10 20 30 40 50 60 70 80 90 100
mp7748 ? 2x20w stereo single ended class d audio amplifier mp7748 rev. 1.0 www.monolithicpower.com 10 1/28/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. block diagram sw1 vdd1 bst1 agnd1 control & gate drive vdd in1 ref1 external under voltage detector pgnd1 aam tm modulator otp ocp timer1 reference uvp1 en1 sw2 vdd2 agnd2 control & gate drive vdd in2 ref2 external under voltage detector pgnd2 aam tm modulator otp ocp timer2 reference uvp2 shutdown bst2 en2 figure1?function block diagram
mp7748 ? 2x20w stereo single ended class d audio amplifier mp7748 rev. 1.0 www.monolithicpower.com 11 1/28/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. operation the mp7748 is a class d audio amplifier for driving stereo speakers in single-ended configuration or a mono speaker in bridge-tied- load configuration. it uses the monolithic power systems patented analog adaptive modulation tm to convert the audio input signal into pulses. these pulses drive an internal high- current output stage and, when filtered through an external inductor-capacitor filter, reproduce the input signal across the load. because of the switching class d output stage, power dissipation in the amplifier is drastically reduced when compared to class a, b or a/b amplifiers while maintaining high fidelity and low distortion. ref1/2 are the positive inputs of the two amplifiers. they are set to half the dc power supply input voltage (v dd /2) by the internal circuit. the input capacitor c in couple the ac signal at the input. the amplifier voltage gain is set by the combination of the input resister r in1/2 and the feedback resistor r fb1/2 and is calculated by the equation: in fb r r av ? = the mp7748 includes four high-power mosfets wherein for each channel the output driver stage uses two 250m ? n-channel mosfets to deliver the pulses to the lc output filter which in turn drives the load. to fully enhance the high-side mosfet, the gate is driven to a voltage higher than the source by the bootstrap capacitor between sw and bs. while the output is driven low, the bootstrap capacitor is charged from v dd through an internal circuit on the mp7748. the gate of the high-side mosfet is driven high from the voltage at bs, forcing the mosfet gate to a voltage higher than v dd and allowing the mosfet to fully turn on, reducing power loss in the amplifier. pop elimination the mp7748 integrates a source current function to charge the ac coupling capacitor c out1/2 for the se output configuration and c in1/2 at the start up moment. the start up source current slew rate is adjustable by selecting different capacitance of timer capacitor c timer1/2 . the larger the capacitance of the timer capacitor is, the smaller the start up current slew rate is. the recommended 2.2f timer capacitor results in a start up current slew rate of approximately 20ma/350ms which would help to minimize the turn on pop. after driving en pin low, output sw will be set to high impedance immediately which would help to eliminate the turn off pop. short circuit/overload protection the mp7748 has internal overload and short circuit protection. the currents in both the high- side and low-side mosfets are measured and if the current exceeds the 4.5a short circuit current limit, both mosfets are turned off. the mp7748 then restarts with the same power up sequence that is used for normal starting to prevent a pop from occurring after a short circuit condition is removed. enable function the mp7748 en input is an active high enable control. to enable the mp7748, drive en with a 2.0v or higher voltage. to disable the amplifier, drive it below 0.4v. while the mp7748 is disabled, the vdd operating current is less than 140a and the output driver mosfets are turned off. programmable uvp mp7748 integrate programmable uvp function, which can be used to shutdown the mp7748 to escape the pop, by controlling the uvp node voltage. the corresponding circuit is shown in the followed figure 2. if the uvp pin is nc, the default vdd shutdown voltage (rising threshold) is 8.4v since there is internal voltage divided circuit. the vdd shutdown voltage can be flexibly adjusted by controlling uvp pin voltage the recommended vdd shutdown voltage is from 9.5v to power supply. as shown in the figure 2, if external resistor r h and r l is low enough (e.g. r h , r l < 50k ? ) compared with internal 500k ? and 550k ? resistor, the vdd shutdown voltage (rising threshold) can be calculated by the equation:
mp7748 ? 2x20w stereo single ended class d audio amplifier mp7748 rev. 1.0 www.monolithicpower.com 12 1/28/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. hl vdd _ shutdown l (r r ) v4* r + = the hysteresis voltage can be calculated by the equation hysteresis vdd _ shutdown v10%*v = figure 2?uvp block diagram
mp7748 ? 2x20w stereo single ended class d audio amplifier mp7748 rev. 1.0 www.monolithicpower.com 13 1/28/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. application information component selection the mp7748 uses a minimum number of external components to complete a stereo se or mono btl class d audio amplifier. the circuit of figure 3 (stereo se application circuit) and figure 4 (mono blt application circuit) are optimized for a 24v power supply. this circuit should be suitable for most applications, and use the following sections to determine how to customize the amplifier for a particular application. setting the voltage gain the maximum output voltage swing is limited by the power supply. to achieve the maximum power out of the mp7748 amplifier, set the gain such that the maximum input signal results in the maximum output voltage swing. for single-ended (se) output configuration, the maximum output voltage v out(pk) is v dd /2. for bridge-tied-load (btl) output configuration, the maximum output voltage v out(pk) is v dd . for a given input signal voltage, where v in(pk) is the peak input voltage, the maximum voltage gain is: ) pk ( in ) pk ( out v v v ) max ( a = this voltage gain setting results in the peak output voltage approaching it?s maximum for the maximum input signal. in some cases the amplifier is allowed to overdrive slightly, allowing the thd to increase at high power levels, and so a higher gain than a v (max) is required. setting the switching frequency the idle switching frequency (the switching frequency when no audio input is present) is a function of several variables: the supply voltage v dd , the integral capacitor c int and the feedback resistor r fb . lower switching frequency results in more inductor ripple, causing more quiescent output voltage ripple and increasing the output noise and distortion. higher switching frequencies result in more power loss. the optimum quiescent switching frequency is approximately 600khz. when used to drive stereo speakers in single-ended configuration, it is recommended to set right channel idle switching frequency larger than left channel?s with 50k hz difference by using different timing capacitor c int . for detailed please refer to the table 1 for recommended se output configuration design, and table 2 for recommended btl output configuration design. table 1?switching frequency setting for se output configuration v dd (v) gain (v/v) r fb (k ? ) r in (k ? ) left channel right channel c int1 (nf) f sw1 (khz) c int2 (nf) f sw2 (khz) 12 5.6 56 10 4.7 560 3.3 700 12 8.2 39 4.7 5.6 620 4.7 700 12 12.0 56.4 4.7 4.7 530 3.3 670 12 17.6 56.4 3.2 4.7 530 3.3 670 12 25.5 56.4 2.2 4.7 530 3.3 670 12 30 60 2 4.7 520 3.3 650 24 5.6 56 10 10 540 8.2 650 24 8.2 82 10 5.6 610 4.7 690 24 12.0 120 10 4.7 530 3.3 660 24 17.4 82 4.7 5.6 610 4.7 690 24 25.5 120 4.7 4.7 530 3.3 660 24 30 120 4 4.7 530 3.3 660 table 2 - switching frequency setting for btl output configuration v dd (v) gain (v/v) r fb (k ? ) r in (k ? ) c int1 (nf) f sw1 (khz) 12 10 100 10 3.9 400 12 20 100 5 3.3 400 12 30 121 4.02 2.7 400 24 10 100 10 3.9 580 24 20 121 6.04 3.9 480 24 30 121 4.02 3.9 480 32 10 100 10 4.7 580 32 20 121 6.04 3.9 560 32 30 162 5.36 3.3 500
mp7748 ? 2x20w stereo single ended class d audio amplifier mp7748 rev. 1.0 www.monolithicpower.com 14 1/28/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. choosing the output lc filter the inductor-capacitor (lc) filter converts the pulse train at sw to the output voltage that drives the speaker. there are two kinds of lc filter structure depending on the output configuration. l f c f c out sw1/2 r load figure 3?se filter configuration l f1 l f2 c y1 c y2 c x sw1 sw2 r load figure 4?btl filter configuration where: 2 f 1 f f l l l + = , 2 y 1 y 2 y 1 y x f c c c c c c + + = , 2 f 1 f l l = ; 2 y 1 y c c = the characteristic frequency of the lc filter needs to be high enough to allow high frequency audio to the output, yet needs to be low enough to filter out high frequency products of the pulses from sw. the characteristic frequency of the lc filter is: f f 0 c l 2 1 f = the quality factor (q) of the lc filter is important. if this is too low, output nois e will increase, if this is too high, then peaking may occur at high signal frequencies reducing the passband flatness. the circuit q is set by the load resistance (speaker resistance, typically 4 ? or 8 ? ). the q is calculated as: load load 0f 0f rr q l2fl == ? 0 is the characteristic frequency in radians per second and f 0 is in hz. use an lc filter with q between 0.7 and 1. the actual output ripple and noise is greatly affected by the type of inductor and capacitor used in the lc filter. use a film capacitor and an inductor with sufficient power handling capability to supply the output current to the load. the inductor should exhibit soft saturation characteristics. if the inductor exhibits hard saturation, it should operate well below the saturation current. gapped ferrite, mpp, powdered iron, or similar type toroidal cores are recommended. if open or shielded bobbin ferrite cores are used for multi-channel designs, make sure that the start windings of each inductor line up (all starts going toward sw pin, or all starts going toward the output) to prevent crosstalk or other channel-to-channel interference. output coupling capacitor for se output the output ac coupling capacitor c out serves to block dc voltages and thus passes only the amplified ac signal from the lc filter to the load. the combination of the coupling capacitor, c out and the load resistance results in a first-order high-pass filter. the value of c out should be selected such that the required minimum frequency is still allowed to pass. the output corner frequency (-3db point), f out , can be calculated as: out load out c r 2 1 f = set the output corner frequency (f out ) at or below the minimum required frequency. the output coupling capacitor carries the full load current, so a capacitor should be chosen such that its ripple current rating is greater than the maximum load current. low esr aluminum electrolytic capacitors are recommended. input coupling capacitor the input coupling capacitors c in1 and c in2 are used to pass only the ac signal at the input. in a typical system application, the source input signal is typically centered around the circuit ground, while the mp7748 input is at half the power supply voltage (v dd /2). the input coupling capacitor transmits the ac signal from the source
mp7748 ? 2x20w stereo single ended class d audio amplifier mp7748 rev. 1.0 www.monolithicpower.com 15 1/28/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. to the mp7748 while blocking the dc voltage. choose an input coupling capacitor such that the corner frequency (f in ) is less than the passband frequency. the corner frequency is calculated as: in in in c r 2 1 f = timer capacitor the start up source current slew rate is adjustable by selecting different capacitance of timer capacitor c timer . the larger the c timer capacitance is, the smaller the start up current slew rate is. it is recommended to use the c timer which capacitance is larger than 312nf, so the start up current slew rate would be smaller than 20ma/50ms which would help to eliminate the turn on pop. the recommended 2.2f capacitor c timer results in a start up current slew rate of approximately 20ma/350ms. power source for maximum output power, the amplifier circuit requires a regulated external power source to supply the power to the amplifier. the higher the power supply voltage, the more power can be delivered to a given load resistance, however if the power source voltage exceeds the maximum voltage of 36v, the mp7748 may sustain damage. the power supply rejection of the mp7748 is excellent, however noise at the power supply can get to the output, so care must be taken to minimize power supply noise within the pass-band frequencies. bypass the power supply with a large capacitor (typically aluminum electrolytic) along with a smaller 1f ceramic capacitor at the mp7748 v dd supply pins. pcb layout the circuit layout is critical for optimum performance and low output distortion and noise. it is highly recommended to duplicate evb layout for optimum performance. if change is necessary, please follow these guidelines and take figure 7 for references. 1) place the following components as close to the mp7748 as possible: bootstrap cap c bs1 and c bs2 are used to supply the gate drive current to the internal high-side mosfet. place c bs1 as close to bst1/2 pin and sw1/2 pin as possible. likewise, place c bs2 as close to bst2 pin and sw2 pins as possible. power supply bypass cap c byp1 and c byp2 carry the transient current for the switching power stage. to prevent overstressing of the mp7748 and excessive noise at the output, place c byp1 as close to vdd1 pins and pgnd1 pins as possible and also place c byp2 as close to vdd2 pins and pgnd2 pins as possible. integral capacitors c int are used to set the amplifier switching frequencies and are typically on the order of a few nf. place the integral capacitor c int as close to the corresponding input as possible to reduce distortion and noise. for example, place c int1 as close to pins 2 and 3 as possible at se output configuration. reference bypass capacitors for se output when used with se output, cr1 and cr2 is needed to filter the ? vdd reference voltages. place c r1 and c r2 as close to the ic as possible to improve power supply rejection and reduce distortion and noise at the output. 2) the inductor-capacitor (lc) filter converts the pulse train at sw to the output voltage that drives the speaker. please keep the filter capacitor close to the inductor. 3) when laying out the pcb, use two separate ground planes, analog ground (agnd) and power ground (pgnd), and connect the two grounds together at a single point (usually around the bulk bypass capacitor) to prevent noise injection into the amplifier input to reduce distortion. 4) keep the sensitive feedback signal trace on the input side and shield the trace with the agnd plane. make sure that any traces carrying the switch node (sw) voltages are separated far from any input signal traces. if it is required to run the sw trace near the input, shield the input with a ground plane between the traces. make sure that each channel is physically separated to prevent crosstalk. make sure that all inductors used on a single circuit board have the same orientation. also, make sure that the power supply is routed from the source to each channel individually, not serially. this prevents channel-to-channel
mp7748 ? 2x20w stereo single ended class d audio amplifier mp7748 rev. 1.0 www.monolithicpower.com 16 1/28/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. coupling through the power supply input. electro-magnetic interference (emi) considerations due to the switching nature of the class d amplifier, care must be taken to minimize the effects of electromagnetic interference from the amplifier. however, with proper component selection and careful attention to circuit layout, the effects of the emi due to the amplifier switching can be minimized. the power inductors are a potential source of radiated emissions. for the best emi performance, use toroidal inductors, since the magnetic field is well contained inside the core. however toroidal inductors can be expensive to wind. for a more economical solution, use shielded gapped ferrite or shielded ferrite bobbin core inductors. these inductors typically do not contain the field as well toroidal inductors, but usually can achieve a better balance of good emi performance with low cost. the size of high-current loops that carry rapidly changing currents needs to be minimized. to do this, make sure that the v dd bypass capacitors are as close to the mp7748 as possible. nodes that carry rapidly changing voltage, such as sw, need to be made as small as possible. if sensitive traces run near a trace connected to sw, place a ground shield between the traces.
mp7748 ? 2x20w stereo single ended class d audio amplifier mp7748 rev. 1.0 www.monolithicpower.com 17 1/28/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. ypical application circuit mp7748 bst1 sw1 bst2 sw2 ref1 2 3 4 10 9 ch1 input 8 6 12 5 11 7 13 ch1 output ch2 output 18,19 22,23 27,28 15,16 20,21 17 25,26 24 in1 timer1 timer2 ref2 in2 en2 en1 agnd2 uvp1 uvp2 agnd1 pgnd2 vdd2 v dd c byp2 c byp1 c vddbyp c f1 l f2 c out2 c f2 c bs2 1uf c c fb1 r fb1 ch2 input en pgnd1 vdd1 c fb2 r fb2 c in2 r in2 c in1 r in1 c r2 c 1000 int2 c r1 c int1 figure 5?24v vdd stereo se typical application circuit mp7748 bst1 sw1 bst2 sw2 ref1 2 3 4 9 8 511 6 7 13 12 10 sp- sp+ 17 18, 19 25, 26 27, 28 20, 21 24 21, 23 15, 16 in1 timer1 timer2 ref2 in2 en2 en1 agnd2 uvp1 uvp2 agnd1 pgnd2 vdd2 c int 1nf c sn2 390pf 50v c sn1 390pf 50v r sn1 10 r sn2 10 c fb2 27pf c fbx2 1pf pgnd1 vdd1 vcc sw2 u1 en vcc sw1 sw2 sw1 input+ c fbx1 1pf c fb1 27pf input- figure 6?24v vdd mono btl typical application circuit
mp7748 ? 2x20w stereo single ended class d audio amplifier mp7748 rev. 1.0 www.monolithicpower.com 18 1/28/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. agnd pgnd c vddbyp ref1 timer1 nc in1 agnd1 en1 uvp1 sw1 bst1 vdd1 sw2 pgnd2 sw1 vdd1 1 7 6 5 4 3 2 8 24 26 19 20 21 22 23 25 pgnd2 ref2 agnd2 timer2 9 10 pgnd1 28 27 pgnd1 mp7748 in2 11 12 nc uvp2 en2 13 14 vdd2 bst2 sw2 15 16 17 18 vdd2 c fb1 r fb1 c fb2 r fb2 c int2 l f2 l f1 c byp1 c byp2 c r1 c int1 c bs2 c bs1 c r2 c f2 c f1 feedback signal top bottom figure 7?stereo se reference pcb layout agnd pgnd c vddbyp ref1 timer1 nc in1 agnd1 en1 uvp1 sw1 bst1 vdd1 sw2 pgnd2 sw1 vdd1 1 7 6 5 4 3 2 8 24 26 19 20 21 22 23 25 pgnd2 ref2 agnd2 timer2 9 10 pgnd1 28 27 pgnd1 mp7748 in2 11 12 nc uvp2 en2 13 14 vdd2 bst2 sw2 15 16 17 18 vdd2 c fb1 r fb1 c fb2 r fb2 l f2 l f1 c byp1 c byp2 c bs2 c bs1 feedback signal c fx2 c fx1 agnd pgnd top bottom figure 8?mono btl reference pcb layout
mp7748 ? 2x20w stereo single ended class d audio amplifier notice: the information in this document is subject to change wi thout notice. please contact m ps for current specifications. users should warrant and guarantee that third party intellectual property rights ar e not infringed upon when integrating mps products into any application. mps will not assume any legal responsibility for any said applications. mp7748 rev. 1.0 www.monolithicpower.com 19 1/28/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. package information tssop28 package outline drawing for 28-tssop w/ exposed paddle side view note: 1) all dimensions are in millimeters. 2) package length does not include mold flash, protrusion or gate burr. 3) package width does not include interlead flash or protrusion. 4) lead coplanarity (bottom of leads after forming) shall be 0.10 millimeters max. 5) drawing conforms to jedec mo-153, variation aet. 6) drawing is not to scale. detail ?a? 0.45 0.75 0 o -8 o 0.25 bsc gauge plane 9.60 9.80 pin 1 id 4.30 4.50 6.20 6.60 1 14 15 28 top view 0.09 0.20 see detail "a" bottom view 2.60 3.10 5.70 6.10 0.19 0.30 seating plane 0.65 bsc 0.80 1.05 1.20 max 0.00 0.15 front view recommended land pattern 5.80 typ 1.60 typ 0.40 typ 0.65 bsc 3.20 typ 5.90 typ

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